unisonic technologies co., ltd CCVGA7C5 preliminary tvs www.unisonic.com.tw 1 of 6 copyright ? 2013 unisonic technologies co., ltd qw-r223-021.a vga port companion circuit ? description the utc CCVGA7C5 is an esd solution for the vga port connector. this device integrates esd protection for all signals, two non-inverting drivers provide buffering for the hsync and vsync signals from the video controller ic. these buffers accept ttl input levels and conver t them to cmos output levels that swing between ground and v cc these drivers have a nominal 60 ? output impedance to match the characteristic impedance of the hsync and vsy nc lines of the video cables typically used. the inputs of these drivers also have high impedance pull ? ups (50k ? nom.) pulling up to the vaux rail. in addition, the ddc_clock and ddc_data channels have 1.8k ? resistors pulling these inputs up to the main 5v (v cc ) rail. the upper esd diodes for the r, g and b channel s are connected to a separate supply rail (v rgb ) to facilitate interfacing to graphics controller ics with low voltage supp lies. the remaining channels are connected to the main 5 v rail (v cc ). the lower diodes for the r, g and b channels ar e also connected to a dedicated ground pin (gnda) to minimize crosstalk due to common ground impedance. esd protection is implemented with current steering diod es designed to safely handle the high peak surge currents associated with the iec ? 1000 ? 4 ? 2 level ? 4 esd protection standard (8kv contac t discharge). when the channels are subjected to an electrostatic discharge, the esd current pulse is diverted via the protection diodes into the positive supply rails or ground where they may be safely dissipated. ? features * 7 channels of esd protection designed to meet iec ? 1000 ? 4 ? 2 level ? 4 esd requirements (8kv contact discharge) * three independent supply pins (v cc , v rgb and v aux ) to facilitate operation with sub ? micron graphics controller ics * very low loading capacitance from esd protection diodes at less than 5pf typical * ttl to cmos level ? translating buffers for the hsync and vsync lines * high impedance pull ? ups (50k ? nominal to vaux) for hsync and vsync inputs * pull ? up resistors (1.8k ? nominal to v cc ) for ddc_clk and ddc_data lines ? ordering information ordering number package packing lead free halogen free CCVGA7C5l-r16-t CCVGA7C5g-r16-t ssop-16 tube CCVGA7C5l-r16-r CCVGA7C5g-r16-r ssop-16 tape reel (1) t: tube, r: tape reel (2) r16: ssop-16 (3) l: lead free, g: halogen free CCVGA7C5l -r16 -t (1)packing type (2)package type (3)lead free
CCVGA7C5 preliminary tvs unisonic technologies co., ltd 2 of 6 www.unisonic.com.tw qw-r223-021.a ? pin configuration ? pin description pin no. pin name description 1 hsync_out horizontal sync signal buffer output. connects to the video connector side of the horizontal sync line. 2 hsync horizontal sync signal buffer input. con nects to the vga controller side of the horizontal sync line. 3, 11 gndd digital ground reference supply pin. 4 v rgb v rgb supply pin. this is an isolated supp ly pin for the r, g and b esd protection circuits. 5 b blue signal video protection channel. this pin is typically tied to the b video line between the vga controller device and the video connector. 6 g green signal video protection channel. this pin is typically tied to the g video line between the vga controller device and the video connector. 7 r red signal video protection channel. this pin is typically tied to the r video line between the vga controller device and the video connector. 8 gnda analog ground reference supply pin. 9, 16 v cc v cc supply pin. this is the main supply input for the ddc_clk and ddc_data pullup resistors and esd protection circuits. it is also connected to the sync buffers and to the esd protection diodes present on the hsync_out and vsync_out lines. 10 ddc_data ddc data pin. 12 ddc_clk ddc clock pin. 13 v aux v aux supply pin. this is the supply input for the 50k ? pullups connected to the hsync and vsync buffer inputs. 14 vsync vertical sync signal buffer input. connects to the vga controller side of the vertical sync line. 15 vsync_out vertical sync signal buffer output. connects to the video connector side of the vertical sync line.
CCVGA7C5 preliminary tvs unisonic technologies co., ltd 3 of 6 www.unisonic.com.tw qw-r223-021.a ? block diagram
CCVGA7C5 preliminary tvs unisonic technologies co., ltd 4 of 6 www.unisonic.com.tw qw-r223-021.a ? absolute maximum rating parameter symbol ratings unit supply voltage inputs v cc , v rgb , v au x gnd-0.5 ~ +6.0 v diode forward current (one diode conducting at a time) 20 ma dc voltage at inputs r, g, b gnd-0.5 ~ v rgb +0.5 v hsync, vsync gnd-0.5 ~ v au x +0.5 v ddc_clk, ddc_data gnd-0.5 ~ v cc +0.5 v package power rating 750 mw operating temperature range t opr 0 ~ +70 c storage temperature range t stg ? 40 ~ +150 c note: absolute maximum ratings are those values beyond which the device could be permanently damaged. absolute maximum ratings are stress ratings only and functional device oper ation is not implied. ? standard operating conditions parameter symbol test conditions min typ max unit main supply voltage v cc 4.5 5.5 v rgb supply voltage v rgb 1.7 3.7 v auxiliary supply voltage v aux 2.9 3.7 v logic high input voltage (note) v ih 2.0 v logic low input voltage (note) v il 0.8 v input voltage rgb v i 0 v rgb v hsync, vsync 0 v aux v ddc_clk, ddc_data 0 v cc v high level output current (note 1) i oh -8 ma low level output current (note 1) i ol 8 ma free ? air operating temperature t a 0 +70 c note: these parameters apply only to the hsync and vsync signals.
CCVGA7C5 preliminary tvs unisonic technologies co., ltd 5 of 6 www.unisonic.com.tw qw-r223-021.a ? electrical characteristics (note 1) parameter symbol test conditions min typ max unit diode forward voltage v f i f =10ma 1.0 v logic high output voltage v oh i oh =-4ma, v cc =4.5v 4.0 v logic low output voltage v ol i ol =4ma, v cc =4.5v 0.4 v input current r, g and b pins i in v rgb =3.63v, v in =v rgb or gnd 1 a hsync, vsync pins v aux =3.63v, v in =v aux 1 a hsync, vsync pins v aux =3.63v, v in =gnd -30.0 -72.5 -95.0 a v cc upply current i cc v cc =5.5v, v aux =v rgb =2.97v, all inputs and outputs floating 35 100 a v rgb supply current i rgb r, g and b pins at v cc r gnd, all inputs and outputs floating 10 a input capacitance r, g and b pins c in note 2 applies for all cases 5 pf hsync, vsync pins 10 pf ddc_data, ddc_clk pins 5 pf pull ? up resistance ddc_data, ddc_clk pins r pu 1.52 1.80 1.98 k ? esd withstand voltage v esd v cc =5 v, v rgb =3.3v, v au x =3.3 v 8 kv sync buffer l h propagation delay t plh c l =50pf, v cc =5.0v, r l =500 ? (note 3) 7.0 15.0 ns sync buffer h l propagation delay t phl c l =50pf, v cc =5.0v, r l =500 ? (note 3) 7.0 15.0 ns sync buffer output rise & fall times t r , t f c l =50pf, v cc =5.0v, r l =500 ? (note 3) 7.0 ns notes: 1. all parameters specified over standa rd operating conditions unless otherwise noted. 2. measured at 1mhz. r/g/b inputs biased at 1.65v with v rgb =3.3v. ddc_clk and ddc_data biased at 2.5v with v cc =5v. hsync and vsync inputs biased at v aux or gnd with v aux =3.3v and v cc =5v. 3. applicable to the sync buffers only. input signals swing between 0v and 3.0v, with rise and fall times 5 ns. guaranteed by correlation to buffer output drive currents.
CCVGA7C5 preliminary tvs unisonic technologies co., ltd 6 of 6 www.unisonic.com.tw qw-r223-021.a ? typical application circuit hsync vsync ddc_data ddc_clk utc CCVGA7C5 v rgb v cc v aux gnda gndd hsync_out vsync_out r g b 4 9, 16 13 2 14 10 12 7 6 5 8 3, 11 digital gnd analog gnd 1 15 video connector h-sync v-sync ddc_data ddc_clk red green blue video controller h-sync v-sync ddc_data ddc_clk red green blue vf** vf** vf** to video dac v dd 5v 3.3v 0.2f 0.2f vf** ? video emi filter sf** ? sync emi filter sf** sf** gnda, the negative voltage rail for t he r, g and b diodes is not connected internally to gndd. gnda should ideally be connected to the ground of the video dac ic. this will prevent any ground bounce caused by digital signals from injecting noise onto the r, g and b signals. analog gnd and digital gnd are typically connected on the printed circuit board. utc assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all utc products described or contained herein. utc products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.
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